The Seagate Surveillance HDD, as those wags in marketing have named it, is the highest capacity of any specialist drive for security camera set-ups, and Seagate cites its main selling points as maximizing uptime while removing the need for excess support.

“Seagate has worked closely with the top surveillance manufacturers to evolve the features of our Surveillance HDD products and deliver a customized solution that has precisely matched market needs in this evolving space for the last 10 years,” said Matt Rutledge, Seagate’s senior vice president for client storage.

“With HD recordings now standard for surveillance applications, Seagate’s Surveillance HDD product line has been designed to support these extreme workloads with ease and is capable of a 180TB/year workload, three times that of a standard desktop drive.

“It also includes surveillance-optimized firmware to support up to 64 cameras and is the only product in the industry that can support surveillance solutions, from single-bay DVRs to large multi-bay NVR systems.”

The 3.5in drive is designed to run 24/7 and is able to capture 800 hours of high-definition video from up to 64 cameras simultaneously, making it ideal for shopping centers, urban areas, industrial complexes and anywhere else you need to feel simultaneously safe and violated. Its capacity will allow 6PB in a 42U rack.

Included in the deal is the Seagate Rescue Service, capable of restoring lost data in two weeks if circumstances permit, and sold with end users in mind for whom an IT support infrastructure is either non-existent or off-site. The service has a 90 percent success rate and is available as part of the drive cost for the first three years.

Seagate demonstrated the drive today at the China Public Security Expo. Where better than the home of civil liberty infringement to show off the new drive?

Earlier this year, Seagate announced a new co-venture with SSD manufacturer Micron, which will come as a huge relief after the recent merger announcement between WD and SanDisk.

Courtesy-http://www.thegurureview.net/computing-category/seagate-goes-8tb-for-surveillance.html

But they are being resisted by the banking industry, which sees no need to invest further in PIN technology, already used with debit cards, resulting in halting adoption and widespread confusion.

A small band of retailers with the clout to call the shots on their branded credit cards is leading the charge. Target Corp is moving ahead with a chip-and-PIN rollout, and Wal-Mart Stores Inc plans to do the same.

But Wal-Mart said it faces obstacles because its credit card partner, Synchrony Financial, is not yet able to handle PINs on credit cards. Synchrony declined comment.

Broadly, U.S. banks are unprepared or resisting the change.

The impasse comes after many consumers got their hands on new credit cards embedded with so-called EMV chips in advance of an Oct. 1 deadline that required retailers to accept chip cards or be liable for fraud losses. EMV stands for EuroPay, MasterCard and Visa.

But only about a third of merchants are actually using the chip technology, according to analyst estimates. The number may not pick up until early next year, if at all, because the retail industry typically halts upgrades during the crucial holiday shopping season.

“PIN issuance will remain a niche,” said Julie Conroy, credit-card analyst with Aite Group.

Banks favor using chip cards verified by old-school signatures, even though chip-and-PIN usage has led to lower fraud over the decade they have been used in Europe and elsewhere.

“The PIN is definitely a must,” said Lance James, chief scientist with cyber intelligence firm Flashpoint. “It’s one extra step that provides true two-factor authentication.”

But bankers say PINs provide little benefit beyond the advantage of using chips in combating the estimated $7 billion-plus in annual U.S. card fraud.

EMV chips thwart criminals who use stolen data to create counterfeit cards, a category that Aite estimates accounts for 37 percent of that fraud. Banks say that PINs only provide additional fraud protection when criminals seek to use lost or stolen cards, a situation that Aite estimates accounts for only 14 percent of fraud.

Banking groups say there are better approaches than PINs for verifying customers and have asked retailers to embrace tokenization and encryption to prevent theft of credit card numbers.

“PIN is a static data element that would not have a meaningful impact on overall payments fraud,” said Electronic Payments Coalition spokesman Sam Fabens.

Courtesy-http://www.thegurureview.net/aroundnet-category/confusion-continues-to-reign-with-u-s-chip-pin.html

The Sparc M7 chip was originally unveiled at last year’s Openworld show in San Francisco, and was touted at the time as a Heartbleed-prevention tool.

A year on, and Oracle announced the Oracle SuperCluster M7, along with Sparc T7 and M7 servers, at the show. The servers are all based on the 32-core, 256-thread M7 microprocessor, which offers Security in Silicon for better intrusion protection and encryption, and SQL in Silicon for improved database efficiency.

Along with built-in security, the SuperCluster M7 packs compute, networking and storage hardware with virtualisation, operating system and management software into one giant cloud infrastructure box.

Oracle CTO Larry Ellison was on hand at Openworld on Tuesday to explain why the notion of building security into the silicon is so important.

“We are not winning a lot of these cyber battles. We haven’t lost the war but we’re losing a lot of the battles. We have to rethink how we deliver technology especially as we deliver vast amounts of data to the cloud,” he told delegates.

Ellison said that Oracle’s approach to this cyber war is to take security as low down in the stack as possible.

“Database security is better than application security. You should always push security as low in the stack as possible. At the bottom of the stack is silicon. If all of your data in the database is encrypted, that’s better than having an application code that encrypts your data. If it’s in the database, every application that uses that database inherits that security,” he explained.

“Silicon security is better than OS security. Then every operating system that runs on that silicon inherits that security. And the last time I checked, even the best hackers have not figured out a way to download changes to your microprocessor. You can’t alter the silicon, that’s really tricky.”

Ellison’s big idea is to take software security features out of operating systems, VMs and even databases in some cases – because software can be changed – and instead push them into the silicon, which can’t be. He is also urging for security to be switched on as default, without an option to turn it back off again.

“The security features should always be on. We provide encryption in our databases but it can be switched off. That is a bad idea. There should be no way to turn off encryption. The idea of being able to turn on and off security features makes no sense,” he said.

Ellison referred back to a debate that took place at Oracle when it first came up with its backup system – should the firm have only encrypted backups. “We did a customer survey and customers said no, we don’t want to pay the performance penalty in some cases,” he recalled. “In that case customer choice is a bad idea. Maybe someone will forget to turn on encryption when it should have been turned on and you lose 10 million credit cards.”

The Sparc M7 is basically Oracle’s answer to this dire security situation. Ellison said that while the M7 has lots of software features built into the silicon, the most “charismatic” of these is Silicon Secured Memory, which is “deceptively simple” in how it works.

“Every time a computer program asks for memory, say you ask for 8MB of memory, we compute a key and assign this large number to that 8MB of memory,” he explained. “We take those bits and we lock that memory. We also assign that same number to the program. Every time the program accesses memory, we check that number to make sure it’s the memory you allocated earlier. That compare is done by the hardware.”

If a program tries to access memory belonging to another program, the hardware detects a mismatch and raises a signal, flagging up a possible breach or bug.

“We put always-on memory intrusion detection into the silicon. We’re always looking for Heartbleed and Venom-like violations. You cannot turn it off,” the CTO warned.

“We’ve also speeded up encryption and decompression, which is kind of related to encryption. It runs at memory speed there’s zero cost in doing that. We turn it on, you can’t turn it off, it’s on all the time. It’s all built into the M7.”

Ellison claimed that running M7-based systems will stop threats like Heartbleed and Venom in their tracks.

“The way Venom worked, the floppy disc driver concealed this code. It’s the worst kind of situation, you’re writing into memory you’re not supposed to. You’re writing computer instructions into the memory and you’ve just taken over the whole computer,” he explained. “You can steal and change data. M7 – the second we tried to write that code into memory that didn’t belong to that program, where the keys didn’t match, that would have been detected real-time and that access would have been foiled.

All well and good, except for the fact that nearly every current computer system doesn’t run off the M7 processor. Ellison claimed that even if only three or four percent of servers in the cloud an organisation is using have this feature, they will be protected as they’ll get the early warning to then deal with the issue across non-M7 systems.

“You don’t have to replace every micro processor, you just have to replace a few so you get the information real-time,” he added.

“You’ll see us making more chips based on security, to secure our cloud and to sell to people who want to secure their clouds or who want to have secure computers in their datacentre. Pushing security down into silicon is a very effective way to do that and get ahead of bad guys.”

SuperCluster M7 and Sparc M7 servers are available now. Pricing has not been disclosed but based on normal Oracle hardware costs, expect to dig deep to afford one.

Source-http://www.thegurureview.net/computing-category/oracles-new-m7-processor-has-security-on-silicon.html

The carrier also announced it is creating a new dedicated network core for IoT connections that can scale far beyond the ability of its existing networks with the intent to reach billions of sensors and devices.

“Continued innovation in smart cities, connected cars and wearables demonstrates that IoT is the future for how we will live and work,” said Mike Lanman, senior vice president of enterprise products at Verizon during an event held at Verizon’s San Francisco Innovation Center. He said Verizon is taking a “holistic approach” to help expand the IoT market from millions of connections to billions. The event was webcast.

Other major wireless carriers, including AT&T, are developing programs to offer a range of services to industries and cities for connecting IoT sensors to wireless networks and then to cloud services for data analysis.

At Verizon, Lanman said the company is working to lower the cost of connecting billions of existing devices that companies have used for years to Verizon’s network. Holding up a new computer chip made by Sequans Communications, an LTE chip maker, he said the chip will provide a “significant reduction in cost…that changes the game.” It will provide 4G LTE connectivity in modules connected to IoT devices to “make the wide-area network more accessible to developers.”

Also, next year Verizon will launch a new IoT core network within its LTE network to provide a “much lower cost” than with Verizon’s existing wired and wireless networks.

“The cost for an IoT module and the cost to connect will both drop dramatically,” Lanman added. “Whether you are connecting your dog or water meters and any other low-payload devices, we’ll handle it through a new IoT core.”

Source-http://www.thegurureview.net/consumer-category/verizon-launches-thingspace-for-iot-development.html

Designed for demanding embedded needs, the processors incorporate the newest AMD 64-bit x86 CPU core (“Excavator”), plus third-generation Graphics Core Next GPU architecture, and better power management for reduced energy consumption.

AMD tells us that combined, these chips provide industry-leading graphics performance and key embedded features for next-generation designs. The SOC architecture enables simplified, small form factor board and system designs from AMD customers and a number of third party development platform providers.

What AMD brings to the party is its graphics and multimedia performance, including capability for hardware-accelerated decode of 4K video playback and support for the latest DDR4 memory.
Jim McGregor, principal analyst, TIRIAS Research said that AMDs push into x86 embedded platforms is paying off with an increasing number of customers and applications.

“There is a need for immersive graphics, high-quality visualization, and parallel computing in an increasing number of embedded applications. Across these fronts, the AMD Embedded R-Series SOC is a very compelling solution.”

Scott Aylor, corporate vice president and general manager, AMD Embedded Solutions said that his outfit’s AMD Embedded R-Series SOC is a strong match for these needs in a variety of industries including digital signage, retail signage, medical imaging, electronic gaming machines, media storage, and communications and networking.

“The platform offers a strong value proposition for this next generation of high-performance, low-power embedded designs.”

The new AMD Embedded R-Series SOCs offer 22 percent improved GPU performance when compared to the 2nd Generation AMD Embedded R-Series APU2 and a 58 percent advantage against the Intel Broadwell Core i7 when running graphics-intensive benchmarks.

AMD released some of the specs for its integrated AMD Radeon graphics including:

Up to eight compute units4 and two rendering blocks

GPU clock speeds up to 800MHz resulting in 819 GFLOPS

•DirectX 12 support

Fully HSA Enabled

The AMD Embedded R-Series SOC was architected with embedded customers in mind and includes features such as industrial temperature support, dual-channel DDR3 or DDR4 support with ECC (Error Correction Code), Secure Boot, and a broad range of processor options.

It has a configurable thermal design power (cTDP) allows designers to adjust the TDPs from 12W to 35W in 1W increments for greater flexibility.

The SOC also has a 35 percent reduced footprint when compared to the 2nd Generation AMD Embedded R-Series APU, making it an excellent choice for small form factor applications.

AMD said that the range is the first embedded processor with dual-channel 64-bit DDR4 or DDR3 with Error-Correction Code (ECC), with speeds up to DDR4-2400 and DDR3-2133, and support for 1.2V DDR4 and 1.5V/1.35V DDR3.

Its dedicated AMD Secure Processor supports secure boot with AMD Hardware Validated Boot (HVB) and initiates trusted boot environment before starting x86 cores
It has a high-performance Integrated FCH featuring PCIe Gen3 USB3.0, SATA3, SD, GPIO, SPI, I2S, I2C, and UART

The AMD Embedded R-Series SOC provides industry-leading ten-year longevity of supply. The processors support Microsoft Windows 7, Windows Embedded 7 and 8 Standard, Windows 8.1, Windows 10, and AMD’s all-open Linux driver including Mentor Embedded Linux from Mentor Graphics and their Sourcery CodeBench IDE development tools.

It will be interesting to see if AMD can make up the ground it has lost on PCs and higher ticket items. Most of the company still appears to be in a holding pattern until Zen arrives.

Courtesy-http://www.thegurureview.net/computing-category/will-amds-newest-soc-save-the-company.html

The new Mali-470 GPU has half the power consumption and two times the energy efficiency of the Mali-400, and is designed for next-generation wearables and IoT devices such as industrial control panels and healthcare monitors that rely on low-cost and low-power chips.

The Mali-470 supports OpenGL ES 2.0, used by Android and Android Wear, hinting that the GPU could also find its way into low-cost smartphones. If not, ARM promises that the chip will bring smartphone-quality visuals to wearable and IoT devices, supporting screen resolutions of up to 640×640 on single-core devices, and higher resolutions for multi-core configurations.

ARM envisions the new GPU paired with its efficient Cortex-A7 or A53 CPU designs for a low-power SoC.

“ARM scrutinises every milliwatt across the entire SoC to enable OEMs to optimize energy efficiency and open up new opportunities,” said Mark Dickinson, vice president and general manager of ARM’s multimedia processing group.

“Tuning efficiency is particularly relevant for devices requiring sophisticated graphics on a low power budget such as wearables, entry-level smartphones and IoT devices. The Mali-470 has been designed to meet this demand by enabling a highly capable user interface while being extremely energy efficient.”

ARM expects the first SoCs using the GPU be ready by the end of 2016, meaning that the chip will start showing up in devices the following year.

The launch of the Mali-470 GPU comes just hours after ARM announced plans to pick up the product portfolio and other business assets of Carbon Design Systems, a supplier of cycle-accurate virtual prototyping solutions.

The deal will see Carbon’s staff transfer to ARM, where the chip firm will make use of the Massachusetts-based outfit’s expertise in virtual prototypes. This will enable ARM to iron out any bugs and make improvements to chips before they move to foundries for production.

ARM also said that Carbon will help the firm enhance its capability in SoC architectural exploration, system analysis and software bring-up.

Courtesy-TheInq

The outfit has been going through hell lately. Last month AMD ace CPU architect Jim Keller stepped away from the company after completing his work on Zen.

Rogers was one of AMD’s high-ranking technology and engineering corporate fellows, and been responsible for helping to develop the software ecosystem behind AMD’s heterogeneous computing products and the Heterogeneous System Architecture.

He was a public figure for AMD and active on the software development and evangelism side, frequently presenting the latest HSA tech and announcements for AMD at keynotes and conferences.

While he is not the only person working on the software side of HSA at AMD, Rogers’ role in its development is important. Rogers was a major contributor to the HSA Foundation, helping to initially found it in 2012. He served as the Foundation’s president until he left AMD.

It seems his defection was kept secret, and took place sometime this quarter and did not manage to leak.

According to his LinkedIn profile Phil Rogers is now Nvidia’s “Chief Software Architect – Compute Server” which is similar to what he was doing over at AMD. Nvidia is not a member of the HSA Foundation, but they are currently gearing up for the launch of the Pascal GPU family, which has some features that overlap well with Phil Rogers’ expertise.

Pascal’s NVLink CPU & GPU interconnect would allow tightly coupled heterogonous computing similar to what AMD has been working on. It makes a fair bit of sense for Nvidia to bring over a heterogeneous compute specialist makes a great deal of sense.

Rogers’ departure from AMD will have to be mentioned on the earnings call on the 15th. AMD’s Gregory Stoner will probably replace him. Stoner is AMD’s current Senior Director of Compute Solutions Technology and long-time Vice President of the HSA Foundation.

Source-http://www.thegurureview.net/computing-category/is-amd-losing-top-scientist-to-nvidia.html

According to EETimes Paul Boudre, who claimed that SOI is already being used by Apple and Intel even though neither company is broadcasting it. SOI appears to be on track to major market penetration even while the rest of the industry is talking FinFETs.

GlobalFoundries general manager Rutger Wijburg told the SEMICON Europa 2015 that his outfit’s 22-nanometer “22FDX” SOI platform delivers FinFET-like performance but at a much lower power point and at a cost comparable to 28-nanometer planar technologies.

The 300-millimeter $250 million FD-SOI foundry here in the “Silicon Saxony” area of Germany, builds on 20 years of GlobalFoundries’ investments in Europe’s largest semiconductor fabs.

GlobalFoundries said it will extend Moore’s Law by using fully-deleted silicon-on-insulator (FD-SOI) transistors on wafers bought from Soitec.

Many had thought that if GloFlo’s FD-SOI gamble paid off then it would be a while before FinFET would have a serious rival. But Boudre’s claims suggests that SOI is already being used.

Customers like Intel and OEMs supplying fully-deleted silicon-on-insulator (FD-SOI) RF transistors to Apple proves that SOI and Soitec are past the cusp of the growth curve, destined to ramp up exponentially.

The problem for Soitec is no one is really talking about it. Chipzilla is committed to the FinFET, because it is higher performance than FD-SOI, even though it is higher power too.
Boudre said that it was supplying SOI wafers to Intel for other applications that don’t require high-performance. For instance, our wafers are very good for their silicon photonics projects.

Apple is already using SOI for several radio frequency (RF) chips in their front-ends, because they use 20-times less power. The iPhone is still using gallium arsenide (GaAs) for its power amplifier (PA) because it needs the high-power device for good connections, but for other RF front-end chips, and in fact for all the chips that they want to keep “always on,” the lower power consumption of FD-SOI is pushing the smartphone makers to Soitec, Boudre said.

SOI wafers cost three-times as much as bulk silicon but the cost per die is less because of the simplified processing steps including fewer masks.

Normally GPS chips run on 0.8 volts and consume over 20 milliamps, so they must be turned off most of the time. But when they are made with SOI wafers, they can run on 0.4 volts and consume only 1 milliamp. The mobile device to leave them on all the time and new and more accurate location sensing and new kinds of location-based applications can be developed.

What is amusing then is that Intel’s reason for going with FinFETs was that SOI wafers were too expensive but it did find a use for it.

GlobalFoundries’ Saxony fab will offer four varieties of its 22FDX process.

FDX-ulp for the mainstream and low-cost smartphone market. This will use body-biasing to beat FinFETs on power, but equal them in performance.

FDX-uhp for networking applications using analogue integration to match FinFETs while minimizing energy consumption

FDX-ull for ultra-low power required by wearables and Internet of Things applications. This will have a 1 picoamp per micron leakage

DDX-rfa for radio frequency (RF) analogue applications delivering 50 percent lower power and reduced system costs for LTE-A cellular transceivers, high-order multiple-input/multiple-output (MIMO) WiFi combo chips and millimeter wave radar.

Courtesy-http://www.thegurureview.net/computing-category/ibm-and-intel-going-goflo-soi.html