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Is Samsung Readying A 10nm SoC?

August 22, 2016 by  
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Of course, it is that time of the year. Apple, Qualcomm, MediaTek and now Samsung will have 10nm SoCs ready for  phones in early 2017. Of course Samsung wants to use its own 10nm SoC in the Galaxy S8 that is expected in late February 2017, but probably with a mix of 10nm Snapdragon too.

Samsung’s next generation Exynos’ name is very uninspired. You don’t call your much better chip just the Exynos 8895, but that might not be the final name.

The Korean giant went from Exynos 7420 for Galaxy S5 and first 14nm for Android followed a year after with Exynos 8890 still 14nm but witha  custom Exynos M1 “Mongoose” plus Cortex-A53eight core combination.

The new SoC is rumored to come with a 4GHz clock. The same leak suggests that the Snapdragon 830 can reach 3.6 GHz which would be quite an increase from the 2.15Ghz that the company gets with the Snapdragon 820. Samsung’s Exynos 8890 stops at 2.6GHz with one or two cores running while it drops to 2.3 GHz when three of four cores from the main cluster run. Calls us sceptics for this 4GHz number as it sounds like quite a leap from the previous generation.

Let us remind ourselves that the clock speed is quite irrelevant as it doesn’t mean anything, and is almost as irrelevant as an Antutu score. It tells you the maximal clock of a SoC but you really want to know the performance per watt or how much TFlops you can expect in the best case. A clock speed without knowing the architecture is insufficient to make any analysis. We’ve seen in the past that 4GHz processors were slower than 2.5GHz processors.

The fact that Samsung continued to use Snapdragon 820 for its latest greatest Galaxy Note 7 means that the company still needs Qualcomm and we don’t think this is going to change anytime soon. Qualcomm traditionally has a better quality modem tailored well for USA, China, Japan and even the complex Europe or the rest of the world.

Courtesy-Fud

ARM Shows Off 10nm Chip 

June 10, 2016 by  
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ARM’s collaboration with TSMC has finally born some fruit with the tapeout of a 10nm test chip to show off the company’s readiness for the new manufacturing process.

The new test chip contains ARM’s yet-to-be-announced “Artemis” CPU core which is named after a goddess who will turn you into deer and tear you apart with wild dogs if you ever see her. [The NDA must have been pretty tough on this chip.ed]

In fact things have been ticking along on this project for ages. ARM discloses that tapeout actually took place back in December last year and is expecting silicon to come back from the foundry in the following weeks.

ARM actually implemented a full four-core Artemis cluster on the test chip which should show vendors what is possible for their production designs. The test chip has a current generation Mali GPU implementation with 1 shader core to show vendors what they will get when they use ARM’s POP IP in conjunction with its GPU IP. There is also a range of other IP blocks and I/O interfaces that are used to validation of the new manufacturing process.

TSMC’s 10FF manufacturing process is supposed to increase density with scaling’s of up to 2.1x compared to the previous 16nm manufacturing node. It also brings about 11-12 per cent higher performance at each process’ respective nominal voltage, or a 30 per cent reduction in power.

ARM siad that comparing a current Cortex A72 design on 16FF+ and an Artemis core on 10FF on the new CPU and process can halve the dynamic power consumption. Currently clock frequencies on the new design are still behind the older more mature process and IP, but ARM expects this to improve as it optimizes its POP and the process stabilizes.

Courtesy-Fud

AMD Goes Full Steam To Open-Source

December 30, 2015 by  
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AMD and now RTG (Radeon Technologies Group) are involved in a major push to open source GPU resources.

According to Ars Technica Under the handle “GPUOpen” AMD is releasing a slew of open-source software and tools to give developers of games, heterogeneous applications, and HPC applications deeper access to the GPU and GPU resources.

In a statement AMD said that as a continuation of the strategy it started with Mantle, it is giving even more control of the GPU to developers.

“ As console developers have benefited from low-level access to the GPU, AMD wants to continue to bring this level of access to the PC space.”

The AMD GPUOpen initiative is meant to give developers the ability to use assets they’ve already made for console development. They will have direct access to GPU hardware, as well as access to a large collection of open source effects, tools, libraries and SDKs, which are being made available on GitHub under an MIT open-source license.

AMD wants GPUOpen will enable console-style development for PC games through this open source software initiative. It also includes an end-to-end open source compute infrastructure for cluster-based computing and a new Linux software and driver strategy

All this ties in with AMD’s Boltzmann Initiative and an HSA (Heterogeneous System Architecture) software suite that includes an HCC compiler for C++ development. This was supposed to open the field of programmers who can use HSA. A new HCC C++ compiler was set up to enable developers to more easily use discrete GPU hardware in heterogeneous systems.

It also allows developers to convert CUDA code to portable C++. According to AMD, internal testing shows that in many cases 90 percent or more of CUDA code can be automatically converted into C++ with the final 10 percent converted manually in the widely popular C++ language. An early access program for the “Boltzmann Initiative” tools is planned for Q1 2016.

AMD GPUOpen includes a new Linux driver model and runtime targeted at HPC Cluster-Class Computing. The headless Linux driver is supposed to handle high-performance computing needs with low latency compute dispatch and PCI Express data transfers, peer-to-peer GPU support, Remote Direct Memory Access (RDMA) from InfiniBand that interconnects directly to GPU memory and Large Single Memory Allocation support.

Courtesy-Fud

AMD Appears To Be Pushing It’s Boltzmann Plan

December 10, 2015 by  
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Troubled chipmaker AMD is putting a lot of its limited investment money into the “Boltzmann Initiative” which is uses heterogeneous system architecture ability to harness both CPU and AMD GPU for compute efficiency through software.

VR-World says that stage one results are finished and where shown off this week at SC15. This included a Heterogeneous Compute Compiler (HCC); a headless Linux driver and HSA runtime infrastructure for cluster-class, High Performance Computing (HPC); and the Heterogeneous-compute Interface for Portability (HIP) tool for porting CUDA-based applications to C++ programming.

AMD hopes the tools will drive application performance from machine learning to molecular dynamics, and from oil and gas to visual effects and computer-generated imaging.

Jim Belak, co-lead of the US Department of Energy’s Exascale Co-design Center in Extreme Materials and senior computational materials scientist at Lawrence Livermore National Laboratory said that AMD’s Heterogeneous-compute Interface for Portability enables performance portability for the HPC community.

“The ability to take code that was written for one architecture and transfer it to another architecture without a negative impact on performance is extremely powerful. The work AMD is doing to produce a high-performance compiler that sits below high-level programming models enables researchers to concentrate on solving problems and publishing groundbreaking research rather than worrying about hardware-specific optimizations.”

The new AMD Boltzmann Initiative suite includes an HCC compiler for C++ development, greatly expanding the field of programmers who can leverage HSA.

The new HCC C++ compiler is a key tool in enabling developers to easily and efficiently apply the hardware resources in heterogeneous systems. The compiler offers more simplified development via single source execution, with both the CPU and GPU code in the same file.

The compiler automates the placement code that executes on both processing elements for maximum execution efficiency.

Source- http://www.thegurureview.net/computing-category/amd-appears-to-be-pushing-its-boltzmann-plan.html

TSMC’s FinFet Coming In 2015?

October 27, 2014 by  
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TSMC has announced that it will begin volume production of 16nm FinFET products in the second half of 2015, in late Q2 or early Q3.

For consumers, this means products based on TSMC 16nm FinFET silicon should appear in late 2015 and early 2016. The first TSMC 16nm FinFET product was announced a few weeks ago.

TSMC executive CC Wei said sales of 16nm FinFET products should account for 7-9% of the foundry’s total revenue in Q4 2015. The company already has more than 60 clients lined up for the new process and it expects 16nm FinFET to be its fastest growing process ever.

Although TSMC is not talking about the actual clients, we already know the roster looks like the who’s who of tech, with Qualcomm, AMD, Nvidia and Apple on board.

This also means the 20nm node will have a limited shelf life. The first 20nm products are rolling out as we speak, but the transition is slow and if TSMC sticks to its schedule, 20nm will be its top node for roughly a year, giving it much less time on top than earlier 28nm and 40nm nodes.

The road to 10nm

TSMC’s 16nm FinFET, or 16FinFET, is just part of the story. The company hopes to tape out the first 10nm products in 2015, but there is no clear timeframe yet.

Volume production of 10nm products is slated for 2016, most likely late 2016. As transitions speed up, TSMC capex will go up. The company expects to invest more than $10bn in 2015, up from $9.6bn this year.

TSMC expects global smartphone shipments to reach 1.5bn units next year, up 19 percent year-on-year. Needless to say, TSMC silicon will power the majority of them.

Source

TSMC Testing ARM’s Cortex A57

April 11, 2013 by  
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ARM and TSMC have manufactured the first Cortex A57 processor based on ARM’s next-gen 64-bit ARMv8 architecture.

The all new chip was fabricated on TSMC’s equally new FinFET 16nm process. The 57 is ARM’s fastest chip to date and it will go after high end tablets, and eventually it will find its place in some PCs and servers as well.

Furthermore the A57 can be coupled with frugal Cortex A53 cores in a big.LITTLE configuration. This should allow it to deliver relatively low power consumption, which is a must for tablets and smartphones. However, bear in mind that A15 cores are only now showing up in consumer products, so it might be a while before we see any devices based on the A57.

In terms of performance, ARM claims the A57 can deliver a “full laptop experience,” even when used in a smartphone connected to a screen, keyboard and mouse wirelessly. It is said to be more power efficient than the A15 and browser performance should be doubled on the A57.

It is still unclear when we’ll get to see the first A57 devices, but it seems highly unlikely that any of them will show up this year. Our best bet is mid-2014, and we are incorrigible optimists. The next big step in ARM evolution will be 20nm A15 cores with next-generation graphics, and they sound pretty exciting as well.

Source

TSMC And Imagination Team Up

April 3, 2013 by  
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TSMC and Imagination Technologies announced the next step in their tech collaboration in an effort to develop Imagination’s next generation PowerVR 6-series GPUs.

The new GPUs are still not ready for prime time, but they should be used in future SoC designs, including those stamped out using TSMC’s 16nm FinFET process. The two companies will work to create new reference system designs, utilizing high bandwidth memory standards and TSMC’s 3D IC technology.

As GPU muscle becomes more important for next generation SoCs, designers need more advanced and more complex processes, such as TSMC’s 16FinFET.

“Through advanced projects initiated under this partnership, Imagination and TSMC are working together to showcase how SoCs will transform the future of mobile and embedded products,” said Hossein Yassaie, CEO of Imagination.

TSMC VP Cliff Hou argued that the need for high performance mobile GPUs will drive silicon processes in the future, much in the same way CPU development pushed new processes in the nineties.

Source…

TSMC 20nm Processors In High Demand

January 31, 2013 by  
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TSMC believes demand for next-generation 20nm chips will be even higher than demand for current 28nm products.

Speaking in a conference call, TSMC CEO Morris Chang said the volume of 20nm SoCs built next year will be greater than 28nm volume in 2012 and by 2015 it should be greater than 28nm volume in 2013.

TSMC hopes to start 20nm production in the latter part of the year. The company is constructing two new facilities at Fab 15 and it hopes to start 20nm production in both simultaneously. We could be in for a quick ramp.

TSMC will offer only one version of the 20nm process, compared to four versions of the 28nm process. This should also allow it to ramp up volume production faster, reckons Xbit Labs.

Source…

TSMC To Boost 28nm Production

December 18, 2012 by  
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TSMC is able to make chips using 28nm process technology at a speedier pace that it originally anticipated. This means that the chipmaker will likely be able to meet demand for existing orders and start accepting new designs.

TSMC promised to increase its 28nm capacity to 68 thousand 300mm wafers per month by the end of the year. It did this by ramping up fab 15/phase 2 to 50,000 300mm wafers a month. According to the Taiwan Economic News it looks like the outfit managed to beat its own projections, which should be good news for customers like AMD, Nvidia and Qualcomm. Well not AMD of course. It just told Globalfoundries to stop making so many of its chips so it can save a bit of money.

But it looks like TSMC is flat out. In November the fab 15/phase 2 processed 52,000 wafers. When combined with fab 15/phase 1, TSMC should be able to process 75 – 80, 000 300mm wafers using 28nm process technologies this month. TSMC produces the majority of 28nm chips at fab 15, which will have capacity of more than 100,000 300mm wafers per month when fully operational.

Source…

TSMC Makes Expansion Plans

September 18, 2012 by  
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TSMC is expected to spend $10 billion next year in capital works as Apple plans to contract the outfit to build its next-generation processors.

According to the Chinese-language Economic Daily News TSMC has informed the equipment suppliers of its decision to hike capital expenditure for 2013 to US$10 billion. This indicates that TSMC has overcome technical problem with 20nm process, which Apple’s next-generation processors are said to use.

It also suggests that Jobs’ Mob is speeding up its reduction of work it gives Samsung. Apple has reportedly sent around 200 design engineers to help TSMC get familiar with the company’s next-generation processor designs at TSMC’s facility in Central Taiwan Science Park.

Source…

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